The present invention provides a method for producing an integrated circuit including forming a capacitor element using a supporting layer.
Conventional semiconductor memories have memory cells that are arranged on a substrate, the memory cells having capacitor elements. The capacitor element may include a bottom plate covered by a dielectric layer. The dielectric layer is covered with a top plate. The capacitor may have the structure of a cylinder capacitor, the structure of a cup capacitor or the structure of a block capacitor. The need for higher integration of memory cells results in capacitor elements covering a smaller area of the substrate. As a result, the capacitor elements are formed by structures that extend from the substrate in a vertical direction up to a maximum height that can be attained by fabricating the capacitor elements. The horizontal area of the substrate is limited and therefore the capacitor elements are fabricated with a high aspect ratio. Furthermore, dielectric material is used having a high k coefficient in order to provide a large amount of electrical charge which can be stored in a small capacitor element. Because of the small sizes of the capacitors, there is a need to improve the method of forming the capacitor element.